Invention Grant
- Patent Title: Method for manufacturing multilayer printed wiring board
- Patent Title (中): 多层印刷线路板的制造方法
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Application No.: US13185295Application Date: 2011-07-18
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Publication No.: US09101070B2Publication Date: 2015-08-04
- Inventor: Hironori Tanaka , Keisuke Shimizu
- Applicant: Hironori Tanaka , Keisuke Shimizu
- Applicant Address: JP Ogaki-shi
- Assignee: IBIDEN CO., LTD.
- Current Assignee: IBIDEN CO., LTD.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-109828 20070418
- Main IPC: H05K1/16
- IPC: H05K1/16 ; H05K1/09 ; H05K3/46

Abstract:
A multilayer printed wiring board includes a core substrate, a resin insulation layer laminated on the core substrate and a capacitor section coupled to the resin insulating layer. The capacitor section includes a first electrode including a first metal and configured to be charged by a negative charge, and a second electrode including a second metal and opposing the first electrode, the second electrode configured to be charged by a positive charge. A dielectric layer is interposed between the first electrode and second electrode, and an ionization tendency of the first metal is larger than and ionization tendency of the second metal.
Public/Granted literature
- US20110271524A1 MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2011-11-10
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