Invention Grant
- Patent Title: Memory device power managers and methods
- Patent Title (中): 内存设备电源管理器和方法
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Application No.: US12359039Application Date: 2009-01-23
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Publication No.: US09105323B2Publication Date: 2015-08-11
- Inventor: Joe M. Jeddeloh
- Applicant: Joe M. Jeddeloh
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/32 ; G06F13/00 ; G11C5/14 ; G11C5/02

Abstract:
Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power management of portions of a stack of memory dies. Additional devices, systems, and methods are disclosed.
Public/Granted literature
- US20100191999A1 MEMORY DEVICE POWER MANAGERS AND METHODS Public/Granted day:2010-07-29
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