Invention Grant
- Patent Title: Calibration of a time-interleaved analog-to-digital converter
- Patent Title (中): 时间交错模数转换器的校准
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Application No.: US14477743Application Date: 2014-09-04
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Publication No.: US09106249B1Publication Date: 2015-08-11
- Inventor: Kenneth Colin Dyer , Jayant Vivrekar
- Applicant: SEMTECH CORPORATION
- Applicant Address: US CA Camarillo
- Assignee: Semtech Corporation
- Current Assignee: Semtech Corporation
- Current Assignee Address: US CA Camarillo
- Agency: McDermott Will & Emery LLP
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H03M1/12 ; H03M1/00

Abstract:
Examples are provided for a method and apparatus for calibration of an analog-to-digital converter (ADC) including multiple sub-ADCs. The method includes applying a calibration signal to an input node of each sub-ADC. For each sub-ADC, a corresponding error signal is generated based on output signals of the sub-ADC and a reference sub-ADC. Each sub-ADC is calibrated based on the corresponding error signal. The reference sub-ADC is selected by: applying a non-zero input voltage signal to the input node of each sub-ADC, measuring a corresponding output signal of each sub-ADC in response to the non-zero input voltage signal, generating a deviation error based on a subtraction of a stored value from the measured output signal of each sub-ADC, and designating as the reference sub-ADC a sub-ADC from the multiple sub-ADCs based on the deviation error.
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