Invention Grant
- Patent Title: Parallel CRC computation with data enables
- Patent Title (中): 并行CRC计算与数据启用
-
Application No.: US14135437Application Date: 2013-12-19
-
Publication No.: US09106388B2Publication Date: 2015-08-11
- Inventor: Venkat Praveen Kumar K. , Nihit Chattar , Dishant Singh Rajput
- Applicant: Vitesse Semiconductor Corporation
- Applicant Address: US CA Aliso Viejo
- Assignee: Microsemi Communications, Inc.
- Current Assignee: Microsemi Communications, Inc.
- Current Assignee Address: US CA Aliso Viejo
- Agency: Klein, O'Neill & Singh, LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H04L1/00 ; H03M13/09 ; G06F11/10
Abstract:
Methods and devices generate cyclic redundancy check (CRC) values for a sequence of parallel words of data. The data words may have only some of the bits enabled. The input words are preconditioned, and then a common block generates a CRC remainder value. A specific preconditioning is selected based on the number of enabled bits. Additional post-processing may be performed to the CRC remainder.
Public/Granted literature
- US20140359404A1 PARALLEL CRC COMPUTATION WITH DATA ENABLES Public/Granted day:2014-12-04
Information query
