Invention Grant
- Patent Title: Reduced power SERDES receiver using selective adaptation of equalizer parameters in response to supply voltage and operating temperature variations and technique for measuring same
- Patent Title (中): SERDES接收机采用选择性调整均衡器参数以响应电源电压和工作温度变化以及测量技术
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Application No.: US14336986Application Date: 2014-07-21
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Publication No.: US09106462B1Publication Date: 2015-08-11
- Inventor: Pervez M. Aziz , Amaresh V. Malipatil , Mohammad S. Mobin
- Applicant: LSI Corporation
- Applicant Address: SG Singapore
- Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
- Current Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Sheridan Ross P.C.
- Main IPC: H04L25/04
- IPC: H04L25/04 ; H04L25/03

Abstract:
Described embodiments include a process and apparatus that takes into account the operating voltage and temperature (VT) variations of a SERDES receiver implemented in an integrated circuit (IC) or system-on-chip (SoC). An analog equalizer (AEQ) adaptation loop and a decision feedback equalizer (DFE) adaptation loop are disabled after the loops have converged or stabilized the parameters of the AEQ and DFE. While the AFE and DFE adaptation loops are disabled, certain monitor coefficients related to signals corrected by the AFE and DFE are adapted and metrics derived therefrom are generated. The metrics are compared to threshold values to check if they have sufficiently changed over time to warrant re-enabling of the AFE and DFE adaptation loops.
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