A chip tester includes a test unit suitable for performing a test on guarantee blocks and for detecting at least one second defective block from the guarantee blocks, a storage unit suitable for storing repair information, a determination unit suitable for comparing the number of available redundancy blocks, which are not allocated for first defective blocks, with the number of at least one second defective block, by referring to the repair information, and a guarantee block management unit suitable for updating the repair information to cancel allocation of at least one of a plurality of redundancy blocks based on a result of the comparison of the determination unit.