A method of forming an interconnect structure with high process margin. The present invention provides higher aligning margin for the connection of via parts and line parts. The method for forming the interconnect structure includes the steps of: forming a first mask layer with a plurality of first openings over the first insulating layer; forming a second insulating layer over the mask layer; forming a second mask layer with a plurality of second openings over the second insulating layer; performing an etching process by using the second mask layer to form a plurality of cavities penetrating through the second insulating layer, the first mask layer, and the first insulating layer; and filling the plurality of cavities with at least one conductive material.