Invention Grant
- Patent Title: Chip arrangement with a recessed chip housing region and a method for manufacturing the same
- Patent Title (中): 具有凹陷芯片壳体区域的芯片布置及其制造方法
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Application No.: US13909158Application Date: 2013-06-04
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Publication No.: US09111947B2Publication Date: 2015-08-18
- Inventor: David O'Sullivan , Thorsten Meyer
- Applicant: Intel Mobile Communications GmbH
- Applicant Address: DE Neubiberg
- Assignee: INTEL DEUTSCHLAND GMBH
- Current Assignee: INTEL DEUTSCHLAND GMBH
- Current Assignee Address: DE Neubiberg
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/28 ; H01L23/04 ; H01L21/56 ; H01L23/31
Abstract:
A chip arrangement may include: a semiconductor chip; an encapsulating structure at least partially encapsulating the semiconductor chip, the encapsulating structure having a first side and a second side opposite the first side, the encapsulating structure including a recess over the first side of the encapsulating structure, the recess having a bottom surface located at a first level; and at least one electrical connector disposed at the first side of the encapsulating structure outside the recess, wherein a surface of the at least one electrical connector facing the encapsulating structure may be disposed at a second level different from the first level.
Public/Granted literature
- US20140353836A1 CHIP ARRANGEMENTS AND A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT Public/Granted day:2014-12-04
Information query
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