Invention Grant
- Patent Title: Semiconductor-on-insulator structure and method of fabricating the same
- Patent Title (中): 绝缘体上半导体结构及其制造方法
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Application No.: US14055229Application Date: 2013-10-16
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Publication No.: US09111996B2Publication Date: 2015-08-18
- Inventor: Jean-Pierre Colinge
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L29/16 ; H01L21/02

Abstract:
Methods for forming a layer of semiconductor material are provided. A substrate is provided. An amorphous layer is formed over the substrate, where the amorphous layer includes a semiconductor or a semiconductor alloy. A seed wafer is bonded to the amorphous layer, where the seed wafer includes a crystalline semiconductor structure. A solid-phase epitaxial (SPE) growth process is performed to crystallize the amorphous layer, where the SPE growth process uses the crystalline semiconductor structure of the seed wafer as a crystal template. The seed wafer is debonded from the structure.
Public/Granted literature
- US20150102471A1 SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND METHOD OF FABRICATING THE SAME Public/Granted day:2015-04-16
Information query
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