Invention Grant
- Patent Title: Multistage voltage regulator circuit
- Patent Title (中): 多级稳压电路
-
Application No.: US12853106Application Date: 2010-08-09
-
Publication No.: US09117507B2Publication Date: 2015-08-25
- Inventor: Ravindraraj Ramaraju , Kenneth R. Burch , Charles E. Seaberg
- Applicant: Ravindraraj Ramaraju , Kenneth R. Burch , Charles E. Seaberg
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G05F1/10
- IPC: G05F1/10 ; G11C5/14 ; G05F1/577 ; G05F1/00

Abstract:
Circuit embodiments of a multistage voltage regulator circuit are presented, where a circuit includes a first stage that includes a first bias transistor having a current terminal coupled to a first regulated node. The circuit also includes a second stage that includes a second bias transistor having a current terminal coupled to a second regulated node. The circuit also includes a third stage including a third bias transistor having a current terminal coupled to a third node. The circuit also includes a control loop for regulating voltages at the first and second regulated nodes, where the second regulated node is connected to a control terminal of the first bias transistor; and where the first regulated node is connected to a control terminal of the third bias transistor.
Public/Granted literature
- US20120032655A1 MULTISTAGE VOLTAGE REGULATOR CIRCUIT Public/Granted day:2012-02-09
Information query
IPC分类: