Invention Grant
US09117808B2 Semiconductor packages and methods of packaging semiconductor devices 有权
半导体封装和封装半导体器件的方法

Semiconductor packages and methods of packaging semiconductor devices
Abstract:
A method of forming semiconductor assemblies is disclosed. The method includes providing an interposer with through interposer vias. The interposer includes a first surface and a second surface. The through interposer vias extend from the first surface to the second surface of the interposer. A first die is mounted on the first surface of the interposer. The first die comprises a first surface with first conductive contacts thereon. The interposer comprises material with coefficient of thermal expansion (CTE) similar to that of the first die. The first conductive contacts of the first die are coupled to the through interposer vias on the first surface of the interposer.
Information query
Patent Agency Ranking
0/0