Invention Grant
US09117877B2 Methods of forming a dielectric cap layer on a metal gate structure
有权
在金属栅极结构上形成电介质盖层的方法
- Patent Title: Methods of forming a dielectric cap layer on a metal gate structure
- Patent Title (中): 在金属栅极结构上形成电介质盖层的方法
-
Application No.: US13350908Application Date: 2012-01-16
-
Publication No.: US09117877B2Publication Date: 2015-08-25
- Inventor: Xiuyu Cai , Ruilong Xie , Jin Cho , John Iacoponi
- Applicant: Xiuyu Cai , Ruilong Xie , Jin Cho , John Iacoponi
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/762 ; H01L29/78 ; H01L29/66

Abstract:
Disclosed herein are various methods of forming isolation structures on FinFETs and other semiconductor devices, and the resulting devices that have such isolation structures. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define a fin for a FinFET device, forming a layer of insulating material in the trenches, wherein the layer of insulating material covers a lower portion of the fin but not an upper portion of the fin, forming a protective material on the upper portion of the fin, and performing a heating process in an oxidizing ambient to form a thermal oxide region on the covered lower portion of the fin.
Public/Granted literature
- US20130181263A1 Methods of Forming a Dielectric Cap Layer on a Metal Gate Structure Public/Granted day:2013-07-18
Information query
IPC分类: