An LCD device according to an embodiment includes a liquid crystal display panel in which n gate lines are formed; a timing controller to generate first to sixth clock signals; a first gate driver to apply a high gate voltage to one ends of the (2k−1)th gate lines in response to the first, third and fifth clock signals; a second gate driver to apply the high gate voltage to one ends of the (2k)th gate lines in response to the second, fourth and sixth clock signals; left discharge circuits each to apply a low gate voltage to the other end of the (2k−1)th gate line according to a voltage level on (2k+1)th gate line; and right discharge circuits each to apply the low gate voltage to the other end of the (2k)th gate line according to the voltage level on (2k+2)th gate line.