Invention Grant
- Patent Title: Memory device for a hierarchical memory architecture
- Patent Title (中): 用于分层存储器架构的存储器件
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Application No.: US12483198Application Date: 2009-06-11
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Publication No.: US09123409B2Publication Date: 2015-09-01
- Inventor: Sean Eilert , Mark Leinwander
- Applicant: Sean Eilert , Mark Leinwander
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/28 ; G11C13/00 ; G06F12/02 ; G06F12/08
Abstract:
A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
Public/Granted literature
- US20100318718A1 MEMORY DEVICE FOR A HIERARCHICAL MEMORY ARCHITECTURE Public/Granted day:2010-12-16
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