Invention Grant
US09123436B2 Adaptive data-retention-voltage regulating system for SRAM 有权
用于SRAM的自适应数据保持电压调节系统

Adaptive data-retention-voltage regulating system for SRAM
Abstract:
An adaptive data-retention-voltage regulating system for static random-access memory (SRAMs) is revealed. The system includes a power supply unit, a data-retention-voltage (DRV) monitor cell for monitoring static noise margin (SNM) of SRAM, a data loss detector for generating a data loss signal, and a dynamic regulating controller that receives the data loss signal for generating a refresh signal and a switch signal. The DVR monitor cell consists of a DRV monitor circuit mounted with a plurality of memory cells, a reset signal generating circuit for resetting the DRV monitor circuit, and an adaptive variation control circuit that generates noise bias according to leakage current to adjust reaction speed of the DRV monitor circuit correspondingly.
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