Invention Grant
US09123569B1 Complementary metal-oxide-semiconductor structure with III-V and silicon germanium transistors on insulator 有权
具有绝缘体III-V和硅锗晶体管的互补金属氧化物半导体结构

Complementary metal-oxide-semiconductor structure with III-V and silicon germanium transistors on insulator
Abstract:
Embodiments for the present invention provide a CMOS structure and methods for fabrication. In an embodiment of the present invention, a CMOS structure comprises a NFET, formed on a wafer, having a gate stack and a channel. A PFET having a gate stack and a channel is also formed on the wafer. The channel of the PFET and the channel of the NFET include semiconductor material formed on III-V semiconductor material, such that the III-V semiconductor material acts like a buried oxide because of a valence band offset between the semiconductor material and the III-V material. There is a height difference between a terminal of the NFET and a terminal of the PFET. In addition, the gate stack NFET is the same height as the gate stack PFET.
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