Invention Grant
US09123701B2 Semiconductor die and package with source down and sensing configuration
有权
半导体芯片和封装,具有源极和感测配置
- Patent Title: Semiconductor die and package with source down and sensing configuration
- Patent Title (中): 半导体芯片和封装,具有源极和感测配置
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Application No.: US13939894Application Date: 2013-07-11
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Publication No.: US09123701B2Publication Date: 2015-09-01
- Inventor: Ralf Otremba , Josef Höglauer , Gerhard Nöbauer , Martin Pölzi
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/66 ; H01L23/48 ; H01L23/00 ; H01L25/07

Abstract:
A semiconductor die includes a semiconductor body, a transistor device disposed in the semiconductor body and having a gate, a source and a drain, and a sense device disposed in the semiconductor body and operable to sense a parameter associated with the transistor device. The die further includes a source pad at a first side of the semiconductor body and electrically connected to the source of the transistor device, a drain pad at a second side of the semiconductor body opposing the first side and electrically connected to the drain of the transistor device, and a sense pad at the second side of the semiconductor body and spaced apart from the drain pad. The sense pad is electrically connected to the sense device. A corresponding package and method of manufacturing are also disclosed.
Public/Granted literature
- US20150014858A1 SEMICONDUCTOR DIE AND PACKAGE WITH SOURCE DOWN AND SENSING CONFIGURATION Public/Granted day:2015-01-15
Information query
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