Invention Grant
- Patent Title: Directional coupler integrated by CMOS process
- Patent Title (中): CMOS工艺集成的定向耦合器
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Application No.: US13641647Application Date: 2012-04-16
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Publication No.: US09123982B2Publication Date: 2015-09-01
- Inventor: Le Ye , Jiayi Wang , Huailin Liao , Ru Huang
- Applicant: Le Ye , Jiayi Wang , Huailin Liao , Ru Huang
- Applicant Address: CN Beijing
- Assignee: Peking University
- Current Assignee: Peking University
- Current Assignee Address: CN Beijing
- Agency: DLA Piper LLP (US)
- Priority: CN201110399962 20111205
- International Application: PCT/CN2012/074063 WO 20120416
- International Announcement: WO2013/082911 WO 20130613
- Main IPC: H01P5/18
- IPC: H01P5/18

Abstract:
A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil wound by a upper layer of metal lines, a coil wound by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is wound by an upper metal layer and the coil is wound by a lower metal layer. Further, the insertion loss is low and the isolation degree is large.
Public/Granted literature
- US20130141183A1 DIRECTIONAL COUPLER INTEGRATED BY CMOS PROCESS Public/Granted day:2013-06-06
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