Invention Grant
- Patent Title: Multichip package structure and method of manufacturing the same
- Patent Title (中): 多芯片封装结构及其制造方法
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Application No.: US13425692Application Date: 2012-03-21
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Publication No.: US09125328B2Publication Date: 2015-09-01
- Inventor: Chia-Tin Chung , Chao-Chin Wu , Fang-Kuei Wu
- Applicant: Chia-Tin Chung , Chao-Chin Wu , Fang-Kuei Wu
- Applicant Address: TW New Taipei
- Assignee: PARAGON SEMICONDUCTOR LIGHTING TECHNOLOGY CO., LTD.
- Current Assignee: PARAGON SEMICONDUCTOR LIGHTING TECHNOLOGY CO., LTD.
- Current Assignee Address: TW New Taipei
- Agency: Li & Cai Intellectual Property (USA) Office
- Priority: TW101102181A 20120119
- Main IPC: F21V7/00
- IPC: F21V7/00 ; H05K3/28 ; H01L33/54 ; H01L33/60

Abstract:
A method of manufacturing a multichip package structure includes: providing a substrate body; placing a plurality of light-emitting chips on the substrate body, where the light-emitting chips are electrically connected to the substrate body; surroundingly forming surrounding liquid colloid on the substrate body to surround the light-emitting chips; naturally drying an outer layer of the surrounding liquid colloid at a predetermined room temperature to form a semidrying surrounding light-reflecting frame, where the semidrying surrounding light-reflecting frame has a non-drying surrounding colloid body disposed on the substrate body and a dried surrounding colloid body totally covering the non-drying surrounding colloid body; and then forming a package colloid body on the substrate body to cover the light-emitting chips, where the semidrying surrounding light-reflecting frame contacts and surrounds the package colloid body.
Public/Granted literature
- US20130188349A1 MULTICHIP PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2013-07-25
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