A test structure of a display panel is provided. The display panel has a display region, a non-display region, and a buffer display region between the display region and non-display region. The test structure is within the buffer display region and includes a substrate, at least one signal line on the substrate, an insulation layer covering the signal line, a planar layer on the insulation layer, and an electrode layer on the planar layer. The planar layer has at least one opening exposing a portion of the insulation layer. The electrode layer has a display electrode portion on the planar layer, at least one test electrode portion connecting the insulation layer via the opening of the planar layer, and a ring-like opening that surrounds the test electrode portion and exposes a portion of the planar layer. The display electrode portion surrounds the ring-like opening and connects the test electrode portion.