Invention Grant
- Patent Title: Silicon and silicon germanium nanowire structures
- Patent Title (中): 硅和硅锗纳米线结构
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Application No.: US14274592Application Date: 2014-05-09
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Publication No.: US09129829B2Publication Date: 2015-09-08
- Inventor: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
- Applicant: Kelin J. Kuhn , Seiyon Kim , Rafael Rios , Stephen M. Cea , Martin D. Giles , Annalisa Cappellani , Titash Rakshit , Peter Chang , Willy Rachmady
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L29/165
- IPC: H01L29/165 ; H01L29/06 ; B82Y10/00 ; H01L21/762 ; H01L29/16 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/775 ; H01L29/78 ; H01L29/786
Abstract:
Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.
Public/Granted literature
- US20140326952A1 SILICON AND SILICON GERMANIUM NANOWIRE STRUCTURES Public/Granted day:2014-11-06
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