Invention Grant
US09129983B2 Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor
有权
存储单元，存储器阵列，形成存储单元的方法以及形成垂直取向的晶闸管和垂直取向的存取晶体管的共用掺杂半导体区域的方法
- Patent Title: Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor
- Patent Title (中): 存储单元，存储器阵列，形成存储单元的方法以及形成垂直取向的晶闸管和垂直取向的存取晶体管的共用掺杂半导体区域的方法
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Application No.: US14066811Application Date: 2013-10-30
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Publication No.: US09129983B2Publication Date: 2015-09-08
- Inventor: Sanh D. Tang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L21/332
- IPC: H01L21/332 ; H01L29/66 ; H01L27/102 ; H01L27/105 ; H01L27/11 ; H01L29/74 ; H01L29/94 ; H01L21/8229
Abstract:
A memory cell includes a thyristor having a plurality of alternately doped, vertically superposed semiconductor regions; a vertically oriented access transistor having an access gate; and a control gate operatively laterally adjacent one of the alternately doped, vertically superposed semiconductor regions. The control gate is spaced laterally of the access gate. Other embodiments are disclosed, including methods of forming memory cells and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor.
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