A method for use in the manufacture of an electronic circuit comprising at least one substantially planar electronic device is disclosed. The method comprises: forming a structure comprising a layer of active material, at least a first conductive track spaced from and extending in a plane generally parallel to the layer of active material, and a layer of insulative material separating the first conductive track from the layer of active material, the layer of active material having a plurality of insulative features formed therein, each insulative feature at least partly inhibiting electrical current flow in the layer of active material and the plurality of insulative features defining at least a first substantially planar electronic device in the layer of active material comprising at least a respective first terminal and a respective second terminal, each terminal comprising a respective area of the layer of active material, and at least a portion of said first conductive track overlapping one of the first and second terminals; forming a first hole in said structure, said first hole extending through the layer of insulative material and connecting an overlapping portion of the first conductive track to one of the first and second terminals; and filling said first hole at least partly with electrically conductive material so as to provide an electrical connection between the first conductive track and one of the first and second terminals.