Invention Grant
US09130059B2 Method of fabricating a semiconductor device having a capping layer
有权
制造具有覆盖层的半导体器件的方法
- Patent Title: Method of fabricating a semiconductor device having a capping layer
- Patent Title (中): 制造具有覆盖层的半导体器件的方法
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Application No.: US13744996Application Date: 2013-01-18
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Publication No.: US09130059B2Publication Date: 2015-09-08
- Inventor: Tsu-Hsiu Perng , Zhao-Cheng Chen , Chun-Hsiang Fan , Ming-Huan Tsai
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/49 ; H01L29/51 ; H01L29/66 ; H01L29/78 ; H01L29/10

Abstract:
A method of semiconductor device fabrication includes forming a first dummy gate structure in a first region of a semiconductor substrate and forming a second dummy gate structure in a second region of the semiconductor substrate. A protective layer (e.g., oxide and/or silicon nitride hard mask) is formed on the second dummy gate structure. The first dummy gate structure is removed after forming the protective layer, thereby providing a first trench. A capping layer (e.g., silicon) is formed in the first trench. A metal gate structure may be formed on the capping layer. The protective layer may protect the second dummy gate structure during the removal of the first dummy gate structure.
Public/Granted literature
- US20140206161A1 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING A CAPPING LAYER Public/Granted day:2014-07-24
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