Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14024896Application Date: 2013-09-12
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Publication No.: US09130062B2Publication Date: 2015-09-08
- Inventor: Kenya Hironaga , Masatoshi Yasunaga , Tatsuya Hirai , Soshi Kuroda
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2012-201566 20120913
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L21/50
Abstract:
Provided is a semiconductor device having improved reliability. In the semiconductor device in an embodiment, a mark is provided correspondingly to the bonding area of a belt-like wiring exposed from an opening provided in a solder resist. As a result, in an alignment step for the wire bonding area, the coordinate position of the wire bonding area can be adjusted using not the end portion of the opening formed in the solder resist, but the mark formed correspondingly to the wire bonding area as a reference. Also, in the semiconductor device in the embodiment, the mark serving as a characteristic pattern is formed. This allows the wire bonding area to be adjusted based on camera recognition.
Public/Granted literature
- US20140073068A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2014-03-13
Information query
IPC分类:
