Invention Grant
- Patent Title: Low-noise flip-chip packages and flip chips thereof
- Patent Title (中): 低噪声倒装芯片封装和倒装芯片
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Application No.: US14152609Application Date: 2014-01-10
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Publication No.: US09136238B2Publication Date: 2015-09-15
- Inventor: Ian Juso Dedic , Ghazanfer Ali
- Applicant: FUJITSU SEMICONDUCTOR LIMITED
- Applicant Address: JP Yokohama
- Assignee: Socionext Inc.
- Current Assignee: Socionext Inc.
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: EP07113378 20070727
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L23/00 ; H01L23/498 ; H01L23/50 ; H01L23/552

Abstract:
A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
Public/Granted literature
- US20140124930A1 LOW-NOISE FLIP-CHIP PACKAGES AND FLIP CHIPS THEREOF Public/Granted day:2014-05-08
Information query
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