Invention Grant
US09136259B2 Method of creating alignment/centering guides for small diameter, high density through-wafer via die stacking
有权
通过管芯堆叠产生小直径，高密度通过晶片的对准/定心导轨的方法
- Patent Title: Method of creating alignment/centering guides for small diameter, high density through-wafer via die stacking
- Patent Title (中): 通过管芯堆叠产生小直径，高密度通过晶片的对准/定心导轨的方法
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Application No.: US12101776Application Date: 2008-04-11
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Publication No.: US09136259B2Publication Date: 2015-09-15
- Inventor: Dave Pratt
- Applicant: Dave Pratt
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L25/00 ; H01L23/48 ; H01L23/00 ; H01L25/065
Abstract:
A method is provided for forming a die stack. The method includes forming a plurality of through-wafer vias and a first plurality of alignment features in a first die. A second plurality of alignment features is formed in a second die, and the first die is stacked on the second die such that the first plurality of alignment features engage the second plurality of alignment features. A method of manufacturing a die stack is also provided that includes forming a plurality of through-wafer vias on a first die, forming a plurality of recesses on a first die, and forming a plurality of protrusions on a second die. A die stack and a system are also provided.
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