Invention Grant
- Patent Title: Semiconductor structure with dielectric-sealed doped region
- Patent Title (中): 具有绝缘密封掺杂区域的半导体结构
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Application No.: US13785927Application Date: 2013-03-05
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Publication No.: US09136329B2Publication Date: 2015-09-15
- Inventor: Huan-Tsung Huang , Kuo-Cheng Wu , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06

Abstract:
Leakage current can be substantially reduced by the formation of a seal dielectric in place of the conventional junction between source/drain region(s) and the substrate material. Trenches are formed in the substrate and lined with a seal dielectric prior to filling the trenches with semiconductor material. Preferably, the trenches are overfilled and a CMP process planarizes the overfill material. An epitaxial layer can be grown atop the trenches after planarization, if desired.
Public/Granted literature
- US20140252426A1 Semiconductor Structure with Dielectric-Sealed Doped Region Public/Granted day:2014-09-11
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