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US09136329B2 Semiconductor structure with dielectric-sealed doped region 有权
具有绝缘密封掺杂区域的半导体结构

Semiconductor structure with dielectric-sealed doped region
Abstract:
Leakage current can be substantially reduced by the formation of a seal dielectric in place of the conventional junction between source/drain region(s) and the substrate material. Trenches are formed in the substrate and lined with a seal dielectric prior to filling the trenches with semiconductor material. Preferably, the trenches are overfilled and a CMP process planarizes the overfill material. An epitaxial layer can be grown atop the trenches after planarization, if desired.
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