Invention Grant
- Patent Title: Dummy gate structure for semiconductor devices
- Patent Title (中): 半导体器件的虚拟门结构
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Application No.: US13345059Application Date: 2012-01-06
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Publication No.: US09136349B2Publication Date: 2015-09-15
- Inventor: Shih-Chi Fu , Chien-Chih Chou
- Applicant: Shih-Chi Fu , Chien-Chih Chou
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L27/02 ; H01L21/762

Abstract:
A structure and method for fabricating a spacer structure for semiconductor devices, such as a multi-gate structure, is provided. The dummy gate structure is formed by depositing a dielectric layer, forming a mask over the dielectric layer, and patterning the dielectric layer. The mask is formed to have a tapered edge. In an embodiment, the tapered edge is formed in a post-patterning process, such as a baking process. In another embodiment, a relatively thick mask layer is utilized such that during patterning a tapered results. The profile of the tapered mask is transferred to the dielectric layer, thereby providing a tapered edge on the dielectric layer.
Public/Granted literature
- US20130175660A1 Dummy Gate Structure for Semiconductor Devices Public/Granted day:2013-07-11
Information query
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