Invention Grant
- Patent Title: Circuit device reliability simulation system
- Patent Title (中): 电路设备可靠性仿真系统
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Application No.: US12818655Application Date: 2010-06-18
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Publication No.: US09141735B2Publication Date: 2015-09-22
- Inventor: Jia-Lin Lo , Ke-Wei Su , Min-Chie Jeng , Feng-Ling Hsiao , Cheng Hsiao , Yi-Shun Huang , Yi-Chun Chen
- Applicant: Jia-Lin Lo , Ke-Wei Su , Min-Chie Jeng , Feng-Ling Hsiao , Cheng Hsiao , Yi-Shun Huang , Yi-Chun Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G01R31/26

Abstract:
The present disclosure provides systems for predicting semiconductor reliability. In an embodiment a method for predicting the semiconductor reliability includes receiving a degradation parameter input of a semiconductor device and using a degradation equation to determine a plurality of bias dependent slope values for degradation over a short time period according to the degradation parameter input. The plurality of slope values include at least two different slope values for degradation over time. The system accumulates the plurality of slope values and projects the accumulated slope values over a long time period to determine a stress effect for the semiconductor device.
Public/Granted literature
- US20110313735A1 CIRCUIT DEVICE RELIABILITY SIMULATION SYSTEM Public/Granted day:2011-12-22
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