Invention Grant
- Patent Title: Asymmetric write scheme for magnetic bit cell elements
- Patent Title (中): 磁位元件的非对称写入方案
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Application No.: US14076427Application Date: 2013-11-11
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Publication No.: US09142278B2Publication Date: 2015-09-22
- Inventor: Xiaochun Zhu , Hari M. Rao , Jung Pill Kim , Seung Hyuk Kang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent C. Teresa Wong; Paul Holdaway
- Main IPC: G11C11/14
- IPC: G11C11/14 ; G11C11/16

Abstract:
A first write driver applies a first voltage above a fixed potential to a first terminal. A second write driver applies a second voltage that is higher above the fixed potential than the first voltage to a second terminal. There is at least one magnetic tunnel junction (MTJ) structure coupled at the first terminal at a first side to the first write driver and coupled at the second terminal at a second side to the second write driver. The first side of the MTJ structure receives the first voltage and the second side of the MTJ structure receives a ground voltage to change from a first state to a second state. The second side of the MTJ structure receives the second voltage and the first side of the MTJ structure receives the ground voltage to change from the second state to the first state.
Public/Granted literature
- US20140063933A1 ASYMMETRIC WRITE SCHEME FOR MAGNETIC BIT CELL ELEMENTS Public/Granted day:2014-03-06
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