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US09142315B2 Methods and systems for adjusting NVM cell bias conditions for read/verify operations to compensate for performance degradation 有权
用于调整NVM单元偏置条件以进行读取/验证操作以补偿性能下降的方法和系统

Methods and systems for adjusting NVM cell bias conditions for read/verify operations to compensate for performance degradation
Abstract:
Methods and systems are disclosed for adjusting read/verify bias conditions for non-volatile memory (NVM) cells to improve performance and product lifetime of NVM systems. System embodiments include integrated NVM systems having a NVM controller, a bias voltage generator, and an NVM cell array. Further, the NVM systems can store performance degradation information and read/verify bias condition information within storage circuitry. The disclosed embodiments adjust read/verify bias conditions for the NVM cells based upon performance degradation determinations, for example, temperature-based performance degradation determinations.
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