Invention Grant
- Patent Title: Integrated circuit device and method for manufacturing same
- Patent Title (中): 集成电路装置及其制造方法
-
Application No.: US14484032Application Date: 2014-09-11
-
Publication No.: US09142537B2Publication Date: 2015-09-22
- Inventor: Gaku Sudo
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-172876 20110808
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L27/02 ; H01L21/8234 ; H01L27/088 ; H01L21/762 ; H01L21/02 ; H01L21/28 ; H01L27/22 ; H01L29/66 ; H01L29/78

Abstract:
An integrated circuit device includes a plurality of fins on an upper surface of a semiconductor substrate and extending in a first direction, a device isolation insulating film placed between the fins, a gate electrode extending in a second direction crossing the first direction on the insulating film; and an insulating film insulating the fin from the gate electrode. In a first region where a plurality of the fins are consecutively arranged, an upper surface of the device isolation insulating film is located at a first position below an upper end of the fin. In a second region located in the second direction as viewed from the first region, the upper surface of the device isolation insulating film is located at a second position above the upper end of the fin. In the second region, the device isolation insulating film covers entirely a side surface of the fin.
Public/Granted literature
- US20140374829A1 INTEGRATED CIRCUIT DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2014-12-25
Information query
IPC分类: