Invention Grant
- Patent Title: Cost effective method of forming embedded DRAM capacitor
- Patent Title (中): 形成嵌入式DRAM电容器的成本有效的方法
-
Application No.: US14496797Application Date: 2014-09-25
-
Publication No.: US09142557B2Publication Date: 2015-09-22
- Inventor: Soogeun Lee
- Applicant: Conversant Intellectual Property Management Inc.
- Applicant Address: CA Ottawa
- Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee Address: CA Ottawa
- Agent Daniel Hammond
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/76 ; H01L29/94 ; H01L31/119 ; H01L49/02 ; H01L23/532

Abstract:
A high capacitance embedded metal interconnect capacitor and associated fabrication processes are disclosed for using a directional barrier metal formation sequence in a dual damascene copper process to form multi-layer stacked copper interconnect structure having reduced barrier metal layer formation at the bottom of each via hole so that the multi-layer stacked copper interconnect structure may be readily removed and replaced with high capacitance MIM capacitor layers.
Public/Granted literature
- US20150102461A1 Cost Effective Method of Forming Embedded DRAM Capacitor Public/Granted day:2015-04-16
Information query
IPC分类: