Invention Grant
US09142660B2 Method to fabricate a vertical transistor having an asymmetric gate with two conductive layers having different work functions
有权
制造具有不对称栅极的垂直晶体管的方法,具有不同功函数的两个导电层
- Patent Title: Method to fabricate a vertical transistor having an asymmetric gate with two conductive layers having different work functions
- Patent Title (中): 制造具有不对称栅极的垂直晶体管的方法,具有不同功函数的两个导电层
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Application No.: US13611113Application Date: 2012-09-12
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Publication No.: US09142660B2Publication Date: 2015-09-22
- Inventor: Dechao Guo , Shu-Jen Han , Keith Kwong Hon Wong , Jun Yuan
- Applicant: Dechao Guo , Shu-Jen Han , Keith Kwong Hon Wong , Jun Yuan
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Harrington & Smith
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L21/8238 ; H01L21/8234 ; H01L29/49 ; H01L29/66

Abstract:
A transistor structure is formed to include a substrate and, overlying the substrate, a source; a drain; and a channel disposed vertically between the source and the drain. The channel is coupled to a gate conductor that surrounds the channel via a layer of gate dielectric material that surrounds the channel. The gate conductor is composed of a first electrically conductive material having a first work function that surrounds a first portion of a length of the channel and a second electrically conductive material having a second work function that surrounds a second portion of the length of the channel. A method to fabricate the transistor structure is also disclosed. The transistor structure can be characterized as being a vertical field effect transistor having an asymmetric gate.
Public/Granted literature
- US20130095623A1 VERTICAL TRANSISTOR HAVING AN ASYMMETRIC GATE Public/Granted day:2013-04-18
Information query
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