Invention Grant
- Patent Title: Semiconductor device integrating passive elements
- Patent Title (中): 集成无源元件的半导体器件
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Application No.: US14016530Application Date: 2013-09-03
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Publication No.: US09147655B2Publication Date: 2015-09-29
- Inventor: Jin-Chern Chiou , Chih-Wei Chang , Tzu Sen Yang
- Applicant: NATIONAL CHIAO TUNG UNIVERSITY
- Applicant Address: TW Hsinchu
- Assignee: National Chiao Tung University
- Current Assignee: National Chiao Tung University
- Current Assignee Address: TW Hsinchu
- Agency: Rosenberg, Klein & Lee
- Priority: TW101149730A 20121225
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L23/522 ; H01L27/01 ; H01L23/48 ; H01L49/02

Abstract:
The present invention provides a semiconductor device integrating passive elements, which applies to analog circuits, wherein capacitors, resistors and inductors are fabricated by a TVS technology. The semiconductor device comprises a substrate; at least one passive element arranged in the substrate; and at least one semiconductor integrated circuit formed in the substrate. The passive element includes a first conductive layer, a first dielectric layer and a second conductive layer, which are stacked sequentially. The first conductive layer and the second conductive layer cooperate with the first dielectric layer to form an equivalent element. The semiconductor circuit is electrically connected with the passive element through the first conductive layer and the second conductive layer to form bidirectional signal transmission paths. The passive elements can be formed on the back side of the substrate to reduce the area occupied by the passive elements in the substrate.
Public/Granted literature
- US20140175607A1 SEMICONDUCTOR DEVICE INTEGRATING PASSIVE ELEMENTS Public/Granted day:2014-06-26
Information query
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