A circuit that protects against ESD and avoids an excessive power voltage drop during the protection operation includes a control circuit that is connected between power terminals and outputs a control signal when a voltage between the power terminals exceeds a predetermined value due to a surge current, and an asymmetric current transfer device including a PN junction reverse-biased by the power voltage between the power terminals, that is connected in series with the output current channel of a shunt transistor. The conductivity of the shunt transistor is controlled according to the control signal.