Low capacitance finFET gate structures and methods of manufacturing. The method includes forming a layer of material on a substrate. The method further includes forming a dummy gate structure on the substrate which abuts the layer of material. The method further includes forming at least one spacer adjacent to the dummy gate structure and the layer of material. The method further includes removing the dummy gate structure and at least a portion of the layer of material to form an opening with a varying length. The method further includes forming a replacement gate structure with varying length by depositing gate material in the opening with the varying length.