A stressed substrate for transient electronic systems (i.e., electronic systems that visually disappear when triggered to do so) that includes one or more stress-engineered layers that store potential energy in the form of a significant internal stress. An associated trigger mechanism is also provided that, when triggered, causes an initial fracture in the stressed substrate, whereby the fracture energy nearly instantaneously travels throughout the stressed substrate, causing the stressed substrate to shatter into multiple small (e.g., micron-sized) pieces that are difficult to detect. The internal stress is incorporated into the stressed substrate through strategies similar to glass tempering (for example through heat or chemical treatment), or by depositing thin-film layers with large amounts of stress. Patterned fracture features are optionally provided to control the final fractured particle size. Electronic systems built on the substrate are entirely destroyed and dispersed during the transience event.