Invention Grant
- Patent Title: Etching cavity structures in silicon under dielectric membrane
- Patent Title (中): 在介电膜下的硅蚀刻腔结构
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Application No.: US12456910Application Date: 2009-06-24
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Publication No.: US09157807B2Publication Date: 2015-10-13
- Inventor: Walter B. Meinel , Kalin V. Lazarov , Brian E. Goodlin
- Applicant: Walter B. Meinel , Kalin V. Lazarov , Brian E. Goodlin
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Alan A. R. Cooper; Frank D. Cimino
- Main IPC: G01J5/12
- IPC: G01J5/12 ; B81C1/00 ; G01J5/02

Abstract:
A semiconductor device includes a semiconductor layer (2) and a dielectric stack (3) on the semiconductor layer. A plurality of etchant openings (24-1,2 . . . ) are formed through the dielectric stack (3) for passage of etchant for etching a plurality of overlapping sub-cavities (4-1,2 . . . ), respectively. The etchant is introduced through the etchant openings to etch a composite cavity (4) in the semiconductor layer by simultaneously etching the plurality of overlapping sub-cavities into the semiconductor layer.
Public/Granted literature
- US20100327393A1 Method and structures for etching cavity in silicon under dielectric membrane Public/Granted day:2010-12-30
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