Invention Grant
- Patent Title: Control circuit of SRAM and operating method thereof
- Patent Title (中): SRAM的控制电路及其操作方法
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Application No.: US13738111Application Date: 2013-01-10
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Publication No.: US09159403B2Publication Date: 2015-10-13
- Inventor: Ching-Te Chuang , Nan-Chun Lien , Wei-Nan Liao , Li-Wei Chu , Chi-Shin Chang , Ming-Hsien Tu
- Applicant: National Chiao Tung University
- Applicant Address: TW Hsinchu
- Assignee: National Chiao Tung University
- Current Assignee: National Chiao Tung University
- Current Assignee Address: TW Hsinchu
- Agency: Bacon & Thomas, PLLC
- Priority: TW101132567A 20120906
- Main IPC: G11C11/412
- IPC: G11C11/412 ; G11C8/08 ; G11C11/418

Abstract:
A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needs to be boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage.
Public/Granted literature
- US20140063918A1 CONTROL CIRCUIT OF SRAM AND OPERATING METHOD THEREOF Public/Granted day:2014-03-06
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