Invention Grant
US09159647B2 Method and apparatus for connecting memory dies to form a memory system
有权
用于连接存储器管芯以形成存储器系统的方法和装置
- Patent Title: Method and apparatus for connecting memory dies to form a memory system
- Patent Title (中): 用于连接存储器管芯以形成存储器系统的方法和装置
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Application No.: US13750046Application Date: 2013-01-25
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Publication No.: US09159647B2Publication Date: 2015-10-13
- Inventor: Byoung Jin Choi
- Applicant: NovaChips Canada Inc.
- Applicant Address: CA Ottawa, Ontario
- Assignee: NovaChips Canada Inc.
- Current Assignee: NovaChips Canada Inc.
- Current Assignee Address: CA Ottawa, Ontario
- Agency: Borden Ladner Gervais LLP
- Agent Shin Hung
- Main IPC: G11C5/06
- IPC: G11C5/06 ; H01L23/48 ; H01L21/50 ; G11C5/04 ; H05K1/02 ; H01L25/065 ; H05K1/18

Abstract:
A method, system and apparatus for connecting multiple memory device dies 51-54 to a substrate 56 which requires no trace between dies. A first embodiment assigns the connections of a memory device die 51 to be matched with other memory device dies 52-54 when mounted in staggered formation on the both sides of a substrate. The result is a daisy chained array connecting multiple integrated circuits with reduced capacitive loading. The capacitive loadings on the buses 57,58 between memory device dies 51,52,53 are reduced. The number of vias 57,58,59 is reduced because two stubs on the both sides of the substrate share one via. Another embodiment FIG. 7 arranges the dies in a closed loop.
Public/Granted literature
- US20130193582A1 METHOD AND APPARATUS FOR CONNECTING MEMORY DIES TO FORM A MEMORY SYSTEM Public/Granted day:2013-08-01
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