Invention Grant
- Patent Title: Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
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Application No.: US13591924Application Date: 2012-08-22
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Publication No.: US09159702B2Publication Date: 2015-10-13
- Inventor: Zhiwei (Tony) Gong , Michael B Vincent , Scott M Hayes , Jason R Wright
- Applicant: Zhiwei (Tony) Gong , Michael B Vincent , Scott M Hayes , Jason R Wright
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR INC.
- Current Assignee: FREESCALE SEMICONDUCTOR INC.
- Current Assignee Address: US TX Austin
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L25/065 ; H01L23/00

Abstract:
Methods for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging a plurality of microelectronic device panels in a panel stack. Each microelectronic device panel contains plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are created in the panel stack exposing the plurality of package edge conductors, and a plurality of sidewall conductors is formed interconnecting different ones of the package edge conductors exposed through the trenches. The panel stack is then separated into a plurality of stacked microelectronic packages each including at least two microelectronic devices electrically interconnected by at least one of the plurality of sidewall conductors included within the stacked microelectronic package.
Public/Granted literature
- US09190390B2 Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof Public/Granted day:2015-11-17
Information query
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