Invention Grant
- Patent Title: Stress buffer layer and method for producing same
- Patent Title (中): 应力缓冲层及其制造方法
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Application No.: US13638518Application Date: 2011-03-24
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Publication No.: US09161438B2Publication Date: 2015-10-13
- Inventor: Hidetoshi Masuda
- Applicant: Hidetoshi Masuda
- Applicant Address: JP Tokyo
- Assignee: TAIYO YUDEN CO., LTD.
- Current Assignee: TAIYO YUDEN CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Pillsbury Winthrop Shaw Pittman, LLP
- Priority: JP2010-082313 20100331
- International Application: PCT/JP2011/057099 WO 20110324
- International Announcement: WO2011/125506 WO 20111013
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/03 ; H05K1/18 ; H01R43/00 ; H05K3/32 ; H05K3/34 ; H01R13/24

Abstract:
A stress buffer sheet 10 is constituted by arranging external conductive layers 16A and 16B on the front and rear main surfaces of a through electrode layer 13. Columnar internal electrodes 14 are formed using a porous oxide base material 30 formed by anodic oxidation of valve metal; the oxide base material 30 is selectively removed after the internal electrodes 14 have been formed, and a resin 12 is filled in a resultant void space. The resin 12 has a small Young's modulus and can be deformed together with the internal electrode 14. In a structure having a wiring board 20 and an electronic component 24 connected through the stress buffer sheet 10, when stress acts on the joint portion during mounting of the electronic component 24, the whole of the through electrode layer 13 is deformed so that the stress is absorbed or released.
Public/Granted literature
- US20130092424A1 STRESS BUFFER LAYER AND METHOD FOR PRODUCING SAME Public/Granted day:2013-04-18
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