Invention Grant
US09165630B2 Offset canceling dual stage sensing circuit 有权
偏移消除双级感测电路

Offset canceling dual stage sensing circuit
Abstract:
An offset canceling dual stage sensing method includes sensing a data value of a resistive memory data cell using a first load PMOS gate voltage generated by a reference value of a resistive memory reference cell in a first stage operation. The method also includes sensing the reference value of the resistive memory reference cell using a second load PMOS gate voltage generated by the data value of the resistive memory data cell in a second stage operation of the resistive memory sensing circuit. By adjusting the operating point of the reference cell sensing, an offset canceling dual stage sensing circuit increases the sense margin significantly compared to that of a conventional sensing circuit.
Public/Granted literature
Information query
Patent Agency Ranking
0/0