Invention Grant
- Patent Title: Junction field effect transistor
- Patent Title (中): 结场效应晶体管
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Application No.: US14560516Application Date: 2014-12-04
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Publication No.: US09166064B2Publication Date: 2015-10-20
- Inventor: Taichi Karino , Hitoshi Sumida
- Applicant: Fuji Electric Co., Ltd.
- Applicant Address: JP Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kanagawa
- Agency: Chen Yoshimura LLP
- Priority: JP2014-005648 20140116
- Main IPC: H01L29/808
- IPC: H01L29/808

Abstract:
In a high voltage JFET, a p-floating region is provided in the surface layer of an n-drift region, thereby increasing the resistance R of the n-drift region and minimizing the voltage divided at a pn junction. This makes it possible to improve ESD capacity without increasing device size and without making the cutoff current smaller.
Public/Granted literature
- US20150200309A1 JUNCTION FIELD EFFECT TRANSISTOR Public/Granted day:2015-07-16
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