Invention Grant
- Patent Title: Timing monitor for PLL
- Patent Title (中): PLL定时监视器
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Application No.: US13455572Application Date: 2012-04-25
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Publication No.: US09166604B2Publication Date: 2015-10-20
- Inventor: Heiko Koerner
- Applicant: Heiko Koerner
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Agency: SpryIP, LLC
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L25/00 ; H04L25/40 ; H03L7/08 ; H03K21/00 ; H03L7/197 ; H03K21/02
Abstract:
Representative implementations of devices and techniques provide error detection for a phase-locked-loop (PLL) device. A timing monitor is arranged to count pulses output by one or more portions of the PLL device, a quantity or pattern of the pulses indicating an error of the PLL device.
Public/Granted literature
- US20130285721A1 TIMING MONITOR FOR PLL Public/Granted day:2013-10-31
Information query
