Invention Grant
- Patent Title: Reception circuit
- Patent Title (中): 接收电路
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Application No.: US14485470Application Date: 2014-09-12
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Publication No.: US09166771B2Publication Date: 2015-10-20
- Inventor: Takayuki Shibasaki
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Priority: JP2013-222353 20131025
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L25/03

Abstract:
A reception circuit includes: an equalizer; a comparator to compare an output signal of the equalizer with first, second, and third thresholds at a first-timing to output first, second, and third comparison-results, respectively; a selector to select any one of the first and second comparison-results based on a determination-result at a timing before the first-timing, and update the determination-result; a detector to detect a phase information based on the first or second comparison-result not selected; a shifter to adjust a sampling clock phase based on the phase information detected; and a controller to set a third threshold based on the first and second thresholds by either adjusting the first and second thresholds based on the output signal amplitude or adding/subtracting a first value to/from the output signal, detect an equalization-result based on the third comparison-result by the set third threshold, and adjust an equalization coefficient based on the detected equalization-result.
Public/Granted literature
- US20150117579A1 RECEPTION CIRCUIT Public/Granted day:2015-04-30
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