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US09170769B2 Crosstalk mitigation in on-chip interfaces 有权
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Crosstalk mitigation in on-chip interfaces
Abstract:
A system and method to reduce and/or eliminate crosstalk between various data paths of a data bus within integrated circuits (i.e., chips). The system and method can transmit both delayed and non-delayed data in respective transmission paths, store the delayed and non-delayed data upon receipt, and delay the reading of the delayed and non-delayed data from the storage unit to compensate for the delay implemented on the transmission of the delayed data.
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