Invention Grant
US09171848B2 Deep trench MIM capacitor and moat isolation with epitaxial semiconductor wafer scheme 有权
深沟槽MIM电容器和外延半导体晶圆方案的护城河隔离

Deep trench MIM capacitor and moat isolation with epitaxial semiconductor wafer scheme
Abstract:
An integrated circuit structure provides at least one metal-insulator-metal (MIM) capacitor and a moat isolation structure wherein the number of processes required is substantially minimized and the formation of the MIM capacitor and the moat isolation structure effectively decouple while the number of processes common to the moat isolation structure and the MIM capacitor are maximized. Additional required processes are non-critical and tolerant of overlay positioning error.
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